A RAM chip has a capacity of 1024 words of 8 bits each 1K 8 The number of 2 4

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Previous Question: The smallest integer than can be represented by an 8-bit number in 2's complement form is Option (A) -256 (B) -128 (C) -127 (D) 0 Next Question: Consider an instruction pipeline with five stages without any branch prediction: Fetch Instruction (FI), Decode Instruction (DI), Fetch Operand (FO), Execute Instruction (EI) and Write Operand (WO). The stage delays for FI, DI, FO, EI and WO are 5 ns, 7 ns, 10 ns, 8 ns and 6 ns, respectively. There are intermediate storage buffers after each stage and the delay of each buffer is 1 ns. A program consisting of 12 instructions 1 2 3 12 I , I , I ,......I is executed in this pipelined processor. Instruction 4 I is the only branch instruction and its branch target is 9 I . If the branch is taken during the execution of this program, the time (in ns) needed to complete the program is Option (A) 132 (B) 165 (C) 176 (D) 328

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A RAM chip has a capacity of 1024 words of 8 bits each (1K Ã— 8) . The number of 2 Ã— 4 decoders with enable line needed to construct a 16K Ã— 16 RAM from 1K Ã— 8 RAM is

Option
(A) 4
(B) 5
(C) 6
(D) 7: Asked In Gate Rats (10 years ago); Unsolved; Is this Puzzle helpful? (5) (2) Submit Your Solution

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Latest Gate Aptitude Question SOLUTION: A RAM chip has a capacity of 1024 words of 8 bits each (1K Ã— 8) . The number of 2 Ã— 4 decoders with enable line needed to construct a 16K Ã— 16 RAM from 1K Ã— 8 RAM i

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(#M40029626) GATE question GATE - CS Keep an EYE

A RAM chip has a capacity of 1024 words of 8 bits each (1K Ã— 8) . The number of 2 Ã— 4 decoders with enable line needed to construct a 16K Ã— 16 RAM from 1K Ã— 8 RAM is

Option
(A) 4
(B) 5
(C) 6
(D) 7

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Latest Gate Aptitude Question SOLUTION: A RAM chip has a capacity of 1024 words of 8 bits each (1K Ã— 8) . The number of 2 Ã— 4 decoders with enable line needed to construct a 16K Ã— 16 RAM from 1K Ã— 8 RAM i

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(#M40029626) GATE question GATE - CS Keep an EYE

A RAM chip has a capacity of 1024 words of 8 bits each (1K Ã— 8) . The number of 2 Ã— 4 decoders with enable line needed to construct a 16K Ã— 16 RAM from 1K Ã— 8 RAM is Option (A) 4 (B) 5 (C) 6 (D) 7

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A RAM chip has a capacity of 1024 words of 8 bits each (1K Ã— 8) . The number of 2 Ã— 4 decoders with enable line needed to construct a 16K Ã— 16 RAM from 1K Ã— 8 RAM is

Option
(A) 4
(B) 5
(C) 6
(D) 7